9
4428E–8051–02/08
AT/TS80C31X2
7.
Dual Data Pointer Register Ddptr
The additional data pointer can be used to speed up code execution and reduce code size in a
number of ways.
The dual DPTR structure is a way by which the chip will specify the address of an external data
memory location. There are two 16-bit DPTR registers that address the external memory, and a
single bit called
DPS = AUXR1/bit0 (See Table 5.) that allows the program code to switch between them (Refer
Figure 7-1.
Use of Dual Pointer
Reset Value = XXXX XXX0
Not bit addressable
Table 7-1.
AUXR1: Auxiliary Register 1
7
6
5
4
3
2
1
0
-
-3
-
DPS
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
0
DPS
Data Pointer Selection
Clear to select DPTR0.
Set to select DPTR1.
External Data Memory
AUXR1(A2H)
DPS
DPH(83H) DPL(82H)
0
7
DPTR0
DPTR1
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